In the data processing of architectural patterns, there is a pattern called the pipes and filters pattern. According to the pipes and filters pattern, software components called filters having the function of inputting, processing and outputting data are connected by pipes so that the connected filters will carry out pipeline processing for processing data sequentially (note that a group of filters for performing one pipeline processing and a set of pipes connecting the filters (pipes and filters) are called a “pipeline” below). Desired filters are connected in desired order to enable various processing, and this makes it easy to configure complicated processing.
Here, the filter is a main component for performing data processing in pipeline processing, and each individual filter process is executed by a processing function such as a CPU (Central Processing Unit) under the control of a computer program. Each of the filter processes configuring one pipeline is not necessarily executed by a single CPU or core, and the filter processes may be executed by different cores, filter by filter. The pipe is a function implemented by a memory such as a RAM (Random Access Memory) to connect the output (standard output) of one filter with the input (standard input) of another filter that follows the one filter.
In an actual system, multiple pipelines may be prepared to perform various processing in parallel. In the meantime, the amount of memory available for pipeline processing may be limited because of the limitations of hardware resources. Thus, in a system for performing pipeline processing, the system performance is significantly affected by how memory is allocated to each pipeline and each of the filters forming the pipeline.
Japanese Patent Application Publication No. 2010-68486 discloses a technique for dynamically allocating memory to pipeline processing as a conventional technique related to memory allocation in a pipes-and-filters architecture. In the conventional technique disclosed in the document, when a memory work area is not enough to perform one pipeline processing, work areas allocated to the other pipelines or some of them are released and allocated to the one pipeline to which memory is not allocated sufficiently.